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156
XMEGA A [MANUAL]
8077I–AVR–11/2012
Event n will be used as count enable
Event n+1 will be used to select between up (1) and down (0). The pin configuration must be set to low level
sensing
Event system controlled quadrature decode counting
14.6.3 32-bit Operation
Two timer/counters can be used together to enable 32-bit counter operation. By using two timer/counters, the overflow
event from one timer/counter (least-significant timer) can be routed via the event system and used as the clock input for
another timer/counter (most-significant timer).
14.6.4 Changing the Period
The counter period is changed by writing a new TOP value to the period register. If double buffering is not used, any
period update is immediate, as shown in Figure 14-7 on page 156.
Figure 14-7. Changing the period without buffering.
A counter wraparound can occur in any mode of operation when up-counting without buffering, as shown in Figure 14-8.
This due to the fact that CNT and PER are continuously compared, and if a new TOP value that is lower than current
CNT is written to PER, it will wrap before a compare match happen.
Figure 14-8. Unbuffered dual-slope operation.
When double buffering is used, the buffer can be written at any time and still maintain correct operation. The period
register is always updated on the UPDATE condition, as shown for dual-slope operation in Figure 14-9. This prevents
wraparound and the generation of odd waveforms.
CNT
MAX
New TOP written to
PER that is higher
than current CNT
Counter Wraparound
New TOP written to
PER that is lower
than current CNT
"update"
"write"
BOTTOM
CNT
MAX
New TOP written to
PER that is higher
than current CNT
New TOP written to
PER that is lower
than current CNT
"update"
"write"
Counter Wraparound
BOTTOM
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